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| AT24C32/64 Features * * * * * * * * * * * * Low Voltage and Standard Voltage Operation 5.0 (VCC = 4.5V to 5.5V) 2.7 (VCC = 2.7V to 5.5V) 2.5 (VCC = 2.5V to 5.5V) 1.8 (VCC = 1.8V to 5.5V) Low Power Devices (ISB = 2 A @ 5.5V) Available Internally Organized 4096 x 8, 8192 x 8 2-Wire Serial Interface Bidirectional Data Transfer Protocol 100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility Write Protect Pin for Hardware Data Protection 32-Byte Page Write Mode (Partial Page Writes Allowed) Self-Timed Write Cycle (10 ms max) High Reliability Endurance: 1 Million Cycles Data Retention: 100 Years Automotive Grade and Extended Temperature Devices Available 8-Pin JEDEC PDIP, 8-Pin and 14-Pin JEDEC SOIC and 8-Pin EIAJ Packages 2-Wire Serial CMOS E2PROM 32K (4096 x 8) 64K (8192 x 8) Description The AT24C32/64 provides 32,768/65,536 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 4096/8192 words of 8 bits each. The device's cascadable feature allows up to 8 devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT24C32/64 is available in space saving 8-pin JEDEC PDIP, 8-pin and 14-pin JEDEC SOIC and 8-pin EIAJ packages and is accessed via a 2-wire serial interface. In addition, the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to 5.5V), 2.5V (2.5V to 5.5V) and 1.8V (1.8V to 5.5V) versions. AT24C32/64 Pin Configurations Pin Name A0 to A2 SDA SCL WP Function Address Inputs Serial Data Serial Clock Input Write Protect 8-Pin PDIP 14-Pin SOIC 8-Pin SOIC 0336D 2-49 Absolute Maximum Ratings* Operating Temperature................... -55C to +125C Storage Temperature...................... -65C to +150C Voltage on Any Pin with Respect to Ground ..................... -0.1V to +7.0V Maximum Operating Voltage ........................... 6.25V DC Output Current ......................................... 5.0 mA *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Block Diagram Pin Description SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each E2PROM device and negative edge clock data out of each device. SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open collector devices. DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that are hard wired or left not connected for hardware compatibility with AT24C16. When the pins are hardwired, as many as eight 32K/64K devices may be addressed on a single bus system (device addressing is discussed in detail under the 2-50 Device Addressing section). When the pins are not hardwired, the default A2, A1, and A0 are zero. WRITE PROTECT (WP): The write protect input, when tied to GND, allows normal write operations. When WP is tied high to VCC, all write operations to the upper quandrant (8/16K bits) of memory are inhibited. If left unconnected, WP is internally pulled down to GND. Memory Organization AT24C32/64, 32K/64K SERIAL E2PROM: The 32K/64K is internally organized as 256 pages of 32-bytes each. Random word addressing requires a 12/13 bit data word address. AT24C32/64 AT24C32/64 Pin Capacitance (1) Applicable over recommended operating range from TA = 25C, f = 1.0 MHz, VCC = +1.8V. Symbol CI/O CIN Note: Test Condition Input/Output Capacitance (SDA) Input Capacitance (A0, A1, A2, SCL) Max 8 6 Units pF pF Conditions VI/O = 0V VIN = 0V 1. This parameter is characterized and is not 100% tested. DC Characteristics Applicable over recommended operating range from: TAI = -40C to +85C, VCC = +1.8V to +5.5V, TAC = 0C to +70C, VCC = +1.8V to +5.5V (unless otherwise noted). Symbol Parameter VCC1 VCC2 VCC3 VCC4 ICC1 ICC2 ISB1 ISB2 ISB3 ISB4 (1) ILI ILO VIL VIH VOL2 VOL1 Supply Voltage Supply Voltage Supply Voltage Supply Voltage Supply Current VCC = 5.0V Supply Current VCC = 5.0V Standby Current (1.8V option) Standby Current (2.5V option) Standby Current (2.7V option) Standby Current (5V option) Input Leakage Current Output Leakage Current Input Low Level (2) Input High Level (2) Output Low Level VCC = 3.0V Output Low Level VCC = 1.8V IOL = 2.1 mA IOL = 0.15 mA VCC = 1.8V VCC = 5.5V VCC = 2.5V VCC = 5.5V VCC = 2.7V VCC = 5.5V VCC = 4.5 - 5.5V READ at 100 kHz WRITE at 100 kHz VIN = VCC or VSS VIN = VCC or VSS VIN = VCC or VSS Test Condition Min 1.8 2.5 2.7 4.5 0.4 2.0 Typ Max 5.5 5.5 5.5 5.5 1.0 3.0 0.1 2.0 0.5 2.0 0.5 2.0 20 0.10 0.05 -1.0 VCC x 0.7 35 3.0 3.0 VCC x 0.3 VCC + 0.5 0.4 0.2 A A A V V V V A A Units V V V V mA mA A VIN = VCC or VSS VIN = VCC or VSS VOUT = VCC or VSS Notes: 1. VCC lockout = 3.8V. 2. VIL min and VIH max are reference only and are not tested. 2-51 AC Characteristics Applicable over recommended operating range from TA = -40C to +85C, VCC = +1.8V to +5.5V, CL = 1 TTL Gate and 100 pF (unless otherwise noted). Symbol Parameter 1.8-volt Min fSCL tLOW tHIGH tI tAA tBUF tHD.STA tSU.STA tHD.DAT tSU.DAT tR tF tSU.STO tDH tWR Note: 2.7-, 2.5-volt Min 4.7 4.0 Max 100 5.0-volt Min 1.2 0.6 Max 400 Units kHz s s 50 0.1 1.2 0.6 0.6 0 100 0.9 ns s s s s s ns 0.3 300 0.6 50 s ns s ns 10 ms Max 100 Clock Frequency, SCL Clock Pulse Width Low Clock Pulse Width High Noise Suppression Time Clock Low to Data Out Valid Time the bus must be free before a new transmission can start (1) Start Hold Time Start Set-up Time Data In Hold Time Data In Set-up Time Inputs Rise Time Inputs Fall Time (1) (1) (1) 4.7 4.0 100 0.1 4.7 4.0 4.7 0 200 1.0 300 4.7 100 20 4.5 100 0.1 4.7 4.0 4.7 0 200 1.0 300 4.7 100 10 4.5 Stop Set-up Time Data Out Hold Time Write Cycle Time 1. This parameter is characterized and is not 100% tested. Device Operation CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods (refer to Data Validity timing diagram). Data changes during SCL high periods will indicate a start or stop condition as defined below. START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which must precede any other command (refer to Start and Stop Definition timing diagram). STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop command will place the E2PROM in a standby power mode (refer to Start and Stop Definition timing diagram). ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the E2PROM in 8 bit words. The E2PROM sends a zero during the ninth clock cycle to acknowledge that it has received each word. STANDBY MODE: The AT24C32/64 features a low power standby mode which is enabled: a) upon power-up and b) after the receipt of the STOP bit and the completion of any internal operations. 2-52 AT24C32/64 AT24C32/64 Bus Timing SCL: Serial Clock SDA: Serial Data I/O Write Cycle Timing SCL: Serial Clock SDA: Serial Data I/O Note: 1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle. 2-53 Data Validity Start and Stop Definition Output Acknowledge 2-54 AT24C32/64 AT24C32/64 Device Addressing The 32K/64K requires an 8 bit device address word following a start condition to enable the chip for a read or write operation (refer to Figure 1). The device address word consists of a mandatory one, zero sequence for the first four most significant bits as shown. This is common to all 2-wire E2PROM devices. The 32K/64K uses the three device address bits A2, A1, A0 to allow as many as eight devices on the same bus. These bits must compare to their corresponding hardwired input pins. The A2, A1, and A0 pins use an internal proprietary circuit that biases them to a logic low condition if the pins are allowed to float. The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit is high and a write operation is initiated if this bit is low. Upon a compare of the device address, the E2PROM will output a zero. If a compare is not made, the device will return to standby state. NOISE PROTECTION: Special internal circuitry placed on the SDA and SCL pins prevent small noise spikes from activating the device. A low-VCC detector (5-volt option) resets the device to prevent data corruption in a noisy environment. DATA SECURITY: The AT24C32/64 has a hardware data protection scheme that allows the user to write protect the upper quadrant (8/16K bits) of memory when the WP pin is at VCC. E2PROM word received. The microcontroller must terminate the page write sequence with a stop condition (refer to Figure 3). The data word address lower 5 bits are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. If more than 32 data words are transmitted to the E2PROM, the data word address will "roll over" and previous data will be overwritten. ACKNOWLEDGE POLLING: Once the internally-timed write cycle has started and the E2PROM inputs are disabled, acknowledge polling can be initiated. This involves sending a start condition followed by the device address word. The read/write bit is representative of the operation desired. Only if the internal write cycle has completed will the E2PROM respond with a zero, allowing the read or write sequence to continue. Read Operations Read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. There are three read operations: current address read, random address read and sequential read. CURRENT ADDRESS READ: The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained. The address "roll over" during read is from the last byte of the last memory page, to the first byte of the first page. The address "roll over" during write is from the last byte of the current page to the first byte of the same page. Once the device address with the read/write select bit set to one is clocked in and acknowledged by the E2PROM, the current address data word is serially clocked out. The microcontroller does not respond with an input zero but does generate a following stop condition (refer to Figure 4). RANDOM READ: A random read requires a "dummy" byte write sequence to load in the data word address. Once the device address word and data word address are clocked in and acknowledged by the E2PROM, the microcontroller must generate another start condition. The microcontroller now initiates a current address read by sending a device address with the read/write select bit high. The E2PROM acknowledges the device address and serially clocks out the data word. The microcontroller does not respond with a zero but does generate a following stop condition (refer to Figure 5). (continued) Write Operations BYTE WRITE: A write operation requires two 8 bit data word addresses following the device address word and acknowledgement. Upon receipt of this address, the E2PROM will again respond with a zero and then clock in the first 8 bit data word. Following receipt of the 8 bit data word, the E2PROM will output a zero and the addressing device, such as a microcontroller, must terminate the write sequence with a stop condition. At this time the E2PROM enters an internally-timed write cycle to the nonvolatile memory. All inputs are disabled during this write cycle and the E2PROM will not respond until the write is complete (refer to Figure 2). PAGE WRITE: The 32K/64K E2PROM is capable of 32byte page writes. A page write is initiated the same way as a byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. Instead, after the E2PROM acknowledges receipt of the first data word, the microcontroller can transmit up to 31 more data words. The E2PROM will respond with a zero after each data 2-55 Read Operations (Continued) SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a random address read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the E2PROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will "roll over" and the sequential read will continue. The sequential read operation is terminated when the microcontroller does not respond with a zero but does generate a following stop condition (refer to Figure 6). Figure 1. Device Address Figure 2. Byte Write Figure 3. Page Write (* = DON'T CARE bits) ( = DON'T CARE bits for the 32K) 2-56 AT24C32/64 AT24C32/64 Figure 4. Current Address Read Figure 5. Random Read (* = DON'T CARE bits) Figure 6. Sequential Read 2-57 Ordering Information tWR (max) (ms) 10 ICC (max) (A) 3000 ISB (max) (A) 35 fMAX (kHz) 400 Ordering Code AT24C32-10PC AT24C32N-10SC AT24C32W-10SC AT24C32-10SC AT24C32-10PI AT24C32N-10SI AT24C32W-10SI AT24C32-10SI AT24C32-10PC-2.7 AT24C32N-10SC-2.7 AT24C32W-10SC-2.7 AT24C32-10SC-2.7 AT24C32-10PI-2.7 AT24C32N-10SI-2.7 AT24C32W-10SI-2.7 AT24C32-10SI-2.7 AT24C32-10PC-2.5 AT24C32N-10SC-2.5 AT24C32W-10SC-2.5 AT24C32-10SC-2.5 AT24C32-10PI-2.5 AT24C32N-10SI-2.5 AT24C32W-10SI-2.5 AT24C32-10SI-2.5 AT24C32-10PC-1.8 AT24C32N-10SC-1.8 AT24C32W-10SC-1.8 AT24C32-10SC-1.8 AT24C32-10PI-1.8 AT24C32N-10SI-1.8 AT24C32W-10SI-1.8 AT24C32-10SI-1.8 Package 8P3 8S1 8S2 14S 8P3 8S1 8S2 14S 8P3 8S1 8S2 14S 8P3 8S1 8S2 14S 8P3 8S1 8S2 14S 8P3 8S1 8S2 14S 8P3 8S1 8S2 14S 8P3 8S1 8S2 14S Operation Range Commercial (0C to 70C) 3000 35 400 Industrial (-40C to 85C) 10 1500 0.5 100 Commercial (0C to 70C) 1500 0.5 100 Industrial (-40C to 85C) 10 1000 0.5 100 Commercial (0C to 70C) 1000 0.5 100 Industrial (-40C to 85C) 10 800 0.1 100 Commercial (0C to 70C) 800 0.1 100 Industrial (-40C to 85C) 2-58 AT24C32/64 AT24C32/64 Ordering Information Package Type 8P3 8S1 8S2 14S 8 Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8 Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8 Lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) 14 Lead, 0.150" Wide, Plastic Gull Wing Small Outline (SOIC) Options Blank -2.7 -2.5 -1.8 Standard Operation (4.5V to 5.5V) Low Voltage (2.7V to 5.5V) Low Voltage (2.5V to 5.5V) Low Voltage (1.8V to 5.5V) 2-59 Ordering Information tWR (max) (ms) 10 ICC (max) (A) 3000 ISB (max) (A) 35 fMAX (kHz) 400 Ordering Code AT24C64-10PC AT24C64N-10SC AT24C64W-10SC AT24C64-10SC AT24C64-10PI AT24C64N-10SI AT24C64W-10SI AT24C64-10SI AT24C64-10PC-2.7 AT24C64N-10SC-2.7 AT24C64W-10SC-2.7 AT24C64-10SC-2.7 AT24C64-10PI-2.7 AT24C64N-10SI-2.7 AT24C64W-10SI-2.7 AT24C64-10SI-2.7 AT24C64-10PC-2.5 AT24C64N-10SC-2.5 AT24C64W-10SC-2.5 AT24C64-10SC-2.5 AT24C64-10PI-2.5 AT24C64N-10SI-2.5 AT24C64W-10SI-2.5 AT24C64-10SI-2.5 AT24C64-10PC-1.8 AT24C64N-10SC-1.8 AT24C64W-10SC-1.8 AT24C64-10SC-1.8 AT24C64-10PI-1.8 AT24C64N-10SI-1.8 AT24C64W-10SI-1.8 AT24C64-10SI-1.8 Package 8P3 8S1 8S2 14S 8P3 8S1 8S2 14S 8P3 8S1 8S2 14S 8P3 8S1 8S2 14S 8P3 8S1 8S2 14S 8P3 8S1 8S2 14S 8P3 8S1 8S2 14S 8P3 8S1 8S2 14S Operation Range Commercial (0C to 70C) 3000 35 400 Industrial (-40C to 85C) 10 1500 0.5 100 Commercial (0C to 70C) 1500 0.5 100 Industrial (-40C to 85C) 10 1000 0.5 100 Commercial (0C to 70C) 1000 0.5 100 Industrial (-40C to 85C) 10 800 0.1 100 Commercial (0C to 70C) 800 0.1 100 Industrial (-40C to 85C) 2-60 AT24C32/64 AT24C32/64 Ordering Information Package Type 8P3 8S1 8S2 14S 8 Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8 Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8 Lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) 14 Lead, 0.150" Wide, Plastic Gull Wing Small Outline (SOIC) Options Blank -2.7 -2.5 -1.8 Standard Operation (4.5V to 5.5V) Low Voltage (2.7V to 5.5V) Low Voltage (2.5V to 5.5V) Low Voltage (1.8V to 5.5V) 2-61 |
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